The present invention is directed to multi-bit sigma-delta analog to digital converters (xe2x80x9cmulti-bit sigma-delta ADCsxe2x80x9d). More particularly, the present invention is directed to multi-bit sigma-delta ADCs having a variable full scale.
Analog to digital converters (xe2x80x9cADCsxe2x80x9d) have been used in a variety of applications and fields of technology, such as communication applications, to provide an effective way of converting analog signals into digital signals. The effectiveness of the analog signal to digital signal conversion is related to the dynamic range of the analog to digital conversion.
For example, in communication applications, the dynamic range of the analog to digital conversion should be greater than 100 dB in order for the analog to digital conversion to not be a performance-limiting operation. Various designs have been proposed to enhance the dynamic range of the analog to digital conversion. An example of one proposed design is illustrated in FIG. 1.
In FIG. 1, an analog to digital converter 2 (xe2x80x9cADCxe2x80x9d) is used to convert analog signals to digital signals. The ADC 2 has a dynamic range associated therewith. The inherent dynamic range of the ADC 2 is enhanced by preceding the ADC 2 with a variable gain amplifier 1.
The variable gain amplifier 1 (xe2x80x9cVGAxe2x80x9d) makes optimal use of the inherent dynamic range of the ADC 2 by providing greater amplification when the input signal is small. Moreover, the VGA 1 provides less amplification when the input signal is large. In this example, an analog signal is fed to the VGA 1 along with a control signal that controls the gain of the VGA 1. As noted above, the gain of the VGA 1 is inversely proportional to the magnitude of the input analog signal. The amplified signal is fed to the ADC 2. The ADC 2 converts the amplified analog signal into a digital signal, which is output from the ADC 2 for further processing, storage, etc.
Another example of a proposed design to enhance the dynamic range of the analog to digital conversion is illustrated in FIG. 2. In the design shown in FIG. 2, the dynamic range of the analog to digital conversion is enhanced by varying a full-scale of an ADC 20. If the ADC is designed such that its input-referred noise also gets smaller as the full-scale is reduced, then reducing the full-scale improves the ADC""s ability to digitize low-level signals and thus extends its dynamic range.
As shown in FIG. 2, an analog signal is fed to the ADC 20 along with a variable reference signal. The variable reference signal controls the full-scale of the ADC 20. In this example, an explicit reference signal (for example, a reference voltage or reference current) is used to determine the full-scale of the ADC 20. Thus, controlling the magnitude of the variable reference level is sufficient to affect the desire control over the full-scale of the ADC 20. Constructing the ADC such that quantization noise dominates thermal noise ensures that the input-referred noise gets smaller as the full-scale is reduced.
A further example of a proposed design to enhance the dynamic range of the analog to digital conversion is illustrated in FIG. 3. In FIG. 3, a one-bit sigma-delta ADC is shown. In this example, the dynamic range of the one-bit sigma-delta ADC is enhanced by controlling a full-scale of the input signal going into a comparator 9. The full-scale of the input signal is controlled by varying the full-scale of a feedback digital to analog converter 7 (xe2x80x9cfeedback DACxe2x80x9d). The full-scale of the feedback DAC 7 is varied in response to a characteristic of a reference signal. The characteristic of the reference signal used to vary the full-scale of the feedback DAC 7 may be a voltage level thereof, a current level thereof, a frequency thereof, etc.
In this example, an analog input is fed into a fixed analog filter 5 along with an analog signal from the feedback DAC 7. The fixed analog filter 5 and the feedback DAC 7 comprise a loop circuit 3. The analog signal from the loop circuit 3 is fed to comparator 9, where the analog signal from the loop circuit 3 is converted to a one-bit digital output signal. As noted above, by changing the full-scale of the feedback DAC 7, the full-scale of the input signal into the comparator 9 is varied.
However, changing the full-scale of the feedback DAC 7 also changes signal levels within the loop circuit 3, namely the output of the fixed analog filter 5. For example, if the full-scale of the feedback DAC 7 is changed by a factor k greater than 0, the signal coming from the loop circuit 3 is also scaled by a factor k. This scaling of the output from the loop circuit 3 is due to the fact that the signal from the feedback DAC 7 forms part of the input to a linear system, namely the fixed analog filter 5, thereby causing the output of the loop circuit 3 to also be scaled by the same factor k.
In this example, the scaling of the input signal does not adversely affect the output of the one-bit sigma-delta ADC since the one-bit sigma-delta ADC is only sensitive to the sign of the output signal of the loop circuit 3. Thus, the one-bit sigma-delta ADC can incorporate a variable gain function simply by providing means for changing the effective full-scale of the feedback DAC 7.
The second requirement for increased dynamic range, namely a reduction in input-referred noise as the full-scale of the ADC is reduced, can be accommodated by a variety of means. For example, a switched-capacitor ADC can use input capacitors that are so large that thermal noise is below the ADC""s quantization noise. Alternatively, a switched-capacitor ADC can adjust the size of its input capacitors in response to, or in order to effect, changes in the ADC""s full-scale. As a further example, if a single bit continuous-time sigma-delta ADC has an input-referred noise that is limited by the dynamic errors or the thermal noise of feedback DAC 7, reducing the full-scale of feedback DAC 7 will reduce the noise associated with feedback DAC 7 and thus reduce the input-referred noise of the ADC.
However, if the sigma-delta ADC employs multi-bit quantization, as is desired in the majority of applications using a sigma-delta ADC, simple scaling of the full-scale of the feedback DAC fails to provide the desired enhanced dynamic range.
As noted above, scaling the full-scale of the feedback DAC 7 scales the input to the quantizer. Since a multi-bit quantizer has some non-zero quantization thresholds, scaling the quantizer""s input results in a change in its output and hence a change in the dynamics of the loop. This change in loop dynamics can be so severe as to make the loop unstable, thereby rendering the ADC inoperable.
Therefore, it is desirable to enhance the dynamic range of a multi-bit sigma-delta ADC in a same manner that a one-bit sigma-delta ADC is enhanced. Furthermore, it is desirable to enhance the dynamic range of a multi-bit sigma-delta ADC without causing the effectiveness of noise shaping to be degraded or a modulator to become unstable. Moreover, it is desirable to ensure that when the full-scale of the input signal to the quantizer of the multi-bit sigma-delta ADC is scaled by a factor k greater than 0, the dynamics of the multi-bit sigma-delta ADC are essentially unchanged.
A first aspect of the present invention is a method for varying an input full-scale level of a multi-bit sigma-delta analog to digital converter having a quantizer, a loop filter circuit, and a digital to analog feedback circuit. The quantizer, loop filter circuit, and digital to analog feedback circuit have a loop gain associated therewith, and the quantizer and loop filter circuit have a combined gain associated therewith. The method varies a full-scale of the digital to analog feedback circuit and varies the combined gain of the quantizer and loop filter circuit in inverse proportion to the full-scale of the digital to analog feedback circuit to maintain the loop gain at a substantially constant level.
A second aspect of the present invention is a multi-bit sigma-delta analog to digital converter. The multi-bit sigma-delta analog to digital converter includes a quantizer; a loop circuit, operatively connected to the quantizer, including a digital to analog feedback circuit; and a reference signal source to provide a reference signal. The quantizer and the loop circuit have a loop gain associated therewith. The digital to analog feedback circuit, in response to the reference signal, varies a full-scale thereof, and the quantizer, in response to the reference signal, changes thresholds thereof.
A third aspect of the present invention is a multi-bit sigma-delta analog to digital converter. The multi-bit sigma-delta analog to digital converter includes a quantizer; a loop circuit, operatively connected to the quantizer, including a digital to analog feedback circuit and a variable gain element; and a gain control signal source to provide a gain control signal and a full-scale control signal. The quantizer and the loop circuit have a loop gain associated therewith. The digital to analog feedback circuit, in response to the full-scale control signal, varies a full-scale thereof, and the variable gain element, in response to the gain control signal, varies a gain thereof.